Beschreibung
InhaltsangabeDedication.- Preface.- Foreword.- Acknowledgments.- 1. Introduction.- 2. Functional and Parametric Defect Models.- 3. Digital CMOS Fault Modeling.- 4. Defects in Logic Circuits and their Test Implications.- 5. Testing Defects and Parametric Variations in RAMs.- 6. Defect Oriented Analog Testing.- 7. Yield Engineering.- 8. Conclusions.- Index.
Produktsicherheitsverordnung
Hersteller:
Springer Verlag GmbH
juergen.hartmann@springer.com
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DE 69121 Heidelberg
Autorenportrait
InhaltsangabeFunctional and Parametric Defect Models.- Digital CMOS Fault Modeling.- Defects in Logic Circuits and their Test Implications.- Testing Defects and Parametric Variations in RAMs.- Defect-Oriented Analog Testing.- Yield Engineering.- Conclusion.
